Paolo Bonzini 9e264985ff Merge branch 'exec_rw_const_v4' of https://github.com/philmd/qemu into HEAD

2020-02-25 13:41:48 +01:00

..

alpha

tcg: Search includes from the project root source directory

2020-01-15 15:13:10 -10:00

arm

target/arm: Set MVFR0.FPSP for ARMv5 cpus

2020-02-21 16:07:03 +00:00

cris

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00

hppa

target/hppa: Allow, but diagnose, LDCW aligned only mod 4

2020-01-27 10:49:51 -08:00

i386

Merge branch 'exec_rw_const_v4' of https://github.com/philmd/qemu into HEAD

2020-02-25 13:41:48 +01:00

lm32

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00

m68k

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00

microblaze

qdev: set properties with device_class_set_props()

2020-01-24 20:59:15 +01:00

mips

target/mips: Separate FPU-related helpers into their own file

2020-02-04 08:53:54 +01:00

moxie

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00

nios2

qdev: set properties with device_class_set_props()

2020-01-24 20:59:15 +01:00

openrisc

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00

ppc

target/ppc/cpu.h: Clean up comments in the struct CPUPPCState definition

2020-02-21 09:15:04 +11:00

riscv

riscv: Separate FPU register size from core register size in gdbstub [v2]

2020-02-10 12:01:36 -08:00

s390x

Let cpu_[physical]_memory() calls pass a boolean 'is_write' argument

2020-02-20 14:47:08 +01:00

sh4

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00

sparc

qdev: set properties with device_class_set_props()

2020-01-24 20:59:15 +01:00

tilegx

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00

tricore

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00

unicore32

tcg: Search includes from the project root source directory

2020-01-15 15:13:10 -10:00

xtensa

cpu: Use cpu_class_set_parent_reset()

2020-01-24 20:59:06 +01:00