455c62d85f
MIPS patches queue - Cavium Octeon MIPS extension and CPU model (Pavel Dovgalyuk) - Semihosting cleanup (Richard Henderson) # gpg: Signature made Tue 12 Jul 2022 21:52:52 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE * tag 'mips-20220712' of https://github.com/philmd/qemu: target/mips: Remove GET_TARGET_STRING and FREE_TARGET_STRING target/mips: Simplify UHI_argnlen and UHI_argn semihosting: Remove qemu_semihosting_log_out target/mips: Use error_report for UHI_assert target/mips: Avoid qemu_semihosting_log_out for UHI_plog target/mips: Use semihosting/syscalls.h target/mips: Drop link syscall from semihosting target/mips: Create report_fault for semihosting target/mips: introduce Cavium Octeon CPU model target/mips: implement Octeon-specific arithmetic instructions target/mips: implement Octeon-specific BBIT instructions target/mips: introduce decodetree structure for Cavium Octeon extension Signed-off-by: Peter Maydell <peter.maydell@linaro.org>