Max Filippov f68774ccd8 tests/tcg/xtensa: only generate defined exception handlers ...

Don't generate handlers for IRQ levels that are not defined for the CPU
or for window overflow/underflow exceptions for configs w/o windowed
registers.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>

2018-09-17 11:09:04 -07:00

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crt.S

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linker.ld.S

tests/tcg/xtensa: move exception handlers to separate section

2018-09-17 11:09:04 -07:00

macros.inc

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Makefile

tests/tcg/xtensa: add test for failed memory transactions

2018-09-17 11:09:04 -07:00

test_b.S

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test_bi.S

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test_boolean.S

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test_break.S

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test_bz.S

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test_cache.S

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test_clamps.S

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test_extui.S

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test_fail.S

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test_interrupt.S

target/xtensa: tests: clean up interrupt tests

2017-01-15 13:36:09 -08:00

test_loop.S

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test_mac16.S

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test_max.S

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test_min.S

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test_mmu.S

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test_mul16.S

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test_mul32.S

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test_nsa.S

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test_phys_mem.S

tests/tcg/xtensa: add test for failed memory transactions

2018-09-17 11:09:04 -07:00

test_pipeline.S

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test_quo.S

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test_rem.S

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test_rst0.S

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test_s32c1i.S

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test_sar.S

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test_sext.S

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test_shift.S

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test_sr.S

target/xtensa: tests: fix memctl SR test

2018-01-09 09:55:38 -08:00

test_timer.S

target/xtensa: tests: add ccount write tests

2017-01-15 13:01:56 -08:00

test_windowed.S

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vectors.S

tests/tcg/xtensa: only generate defined exception handlers

2018-09-17 11:09:04 -07:00