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d0fa1f0df3c8c269df083e2c8a10dfad09dffcf3
qemu-esp-boards/target-cris
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Edgar E. Iglesias 3065839c72 cris: Add interrupt signals to the CPU device
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
2014-02-03 14:03:59 +00:00
..
cpu-qom.h
target-cris: Factor out CPUClass::gdb_read_register() hook for v10
2013-07-27 00:04:17 +02:00
cpu.c
cris: Add interrupt signals to the CPU device
2014-02-03 14:03:59 +00:00
cpu.h
cris: Add interrupt signals to the CPU device
2014-02-03 14:03:59 +00:00
crisv10-decode.h
…
crisv32-decode.h
janitor: add guards to headers
2012-12-19 08:31:31 +01:00
gdbstub.c
target-cris: Factor out CPUClass::gdb_read_register() hook for v10
2013-07-27 00:04:17 +02:00
helper.c
cris: Abort when a v10 takes interrupts while in a delayslot
2014-02-03 14:03:59 +00:00
helper.h
tcg: Remove stray semi-colons from target-*/helper.h
2013-10-10 11:43:37 -07:00
machine.c
…
Makefile.objs
cpu: Introduce CPUClass::gdb_{read,write}_register()
2013-07-27 00:04:17 +02:00
mmu.c
…
mmu.h
…
op_helper.c
target-cris: Build fix for debug output
2013-02-04 16:12:57 +01:00
opcode-cris.h
…
translate_v10.c
target-cris: Move TCG initialization to CRISCPU initfn
2013-02-16 14:50:58 +01:00
translate.c
target-cris: Use new qemu_ld/st opcodes
2013-12-08 09:36:02 +01:00
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