Fix SPI-SD write-token timing and CMD13 response
ssi-sd now enters token mode as it returns the final R1 byte, so the write-data token that immediately follows is not discarded. SPI CMD13 returns the internal sd_r1 response (upstream fix) instead of sd_r2_s, which the adapter converts to the two-byte SPI R2 status; this stops the repeated "Unexpected response to cmd 13" loop on guest status polls. Drops the experimental store-TB TCI forcing and sd-watch OOB logging now that the raw FAT32 image path is stable.
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-1
@@ -1649,7 +1649,7 @@ static sd_rsp_type_t sd_cmd_SEND_STATUS(SDState *sd, SDRequest req)
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}
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}
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if (sd_is_spi(sd)) {
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if (sd_is_spi(sd)) {
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return sd_r2_s;
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return sd_r1;
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}
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}
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return sd_req_rca_same(sd, req) ? sd_r1 : sd_r0;
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return sd_req_rca_same(sd, req) ? sd_r1 : sd_r0;
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+10
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@@ -260,8 +260,16 @@ static uint32_t ssi_sd_transfer(SSIPeripheral *dev, uint32_t val)
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return SSI_DUMMY;
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return SSI_DUMMY;
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case SSI_SD_RESPONSE:
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case SSI_SD_RESPONSE:
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if (s->response_pos < s->arglen) {
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if (s->response_pos < s->arglen) {
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DPRINTF("Response 0x%02x\n", s->response[s->response_pos]);
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uint8_t response = s->response[s->response_pos++];
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return s->response[s->response_pos++];
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DPRINTF("Response 0x%02x\n", response);
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/* Write Token Timing - A write-data token may immediately follow the final R1 byte.
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* Enter token mode now so the next transfer is not discarded. */
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if (s->response_pos == s->arglen &&
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sdbus_receive_ready(&s->sdbus)) {
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s->mode = SSI_SD_CMD;
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}
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return response;
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}
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}
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if (s->stopping) {
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if (s->stopping) {
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s->stopping = 0;
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s->stopping = 0;
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@@ -29,7 +29,6 @@
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#include <emscripten.h>
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#include <emscripten.h>
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#include <emscripten/threading.h>
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#include <emscripten/threading.h>
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#include "wasm32.h"
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#include "wasm32.h"
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#include "exec/translation-block.h"
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__thread uintptr_t tci_tb_ptr;
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__thread uintptr_t tci_tb_ptr;
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__thread bool wasm_tci_only_tb;
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__thread bool wasm_tci_only_tb;
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@@ -511,19 +510,6 @@ static void tci_qemu_st(CPUArchState *env, uint64_t taddr, uint64_t val,
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uintptr_t ra = (uintptr_t)tb_ptr;
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uintptr_t ra = (uintptr_t)tb_ptr;
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uint64_t target_addr = tlb_load(env, taddr, mop, ptr, false);
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uint64_t target_addr = tlb_load(env, taddr, mop, ptr, false);
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if (target_addr != 0) {
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uint64_t mem_bytes = (uint64_t)__builtin_wasm_memory_size(0) << 16;
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if (target_addr + (1u << (mop & MO_SIZE)) > mem_bytes) {
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TranslationBlock *tb = tcg_tb_lookup(ra);
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fprintf(stderr,
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"[sd-watch] OOB store pc=%08llx gaddr=%08llx haddr=%08llx size=%u value=%08llx membytes=%08llx\n",
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(unsigned long long)(tb ? tb->pc : 0),
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(unsigned long long)taddr, (unsigned long long)target_addr,
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1u << (mop & MO_SIZE), (unsigned long long)val,
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(unsigned long long)mem_bytes);
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return;
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}
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}
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if (target_addr != 0) {
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if (target_addr != 0) {
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switch (mop & MO_SIZE) {
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switch (mop & MO_SIZE) {
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case MO_UB:
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case MO_UB:
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@@ -3370,7 +3370,6 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGOpcode opc, const TCGArg *args, bo
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}
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}
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static void tcg_out_qemu_st(TCGContext *s, TCGOpcode opc, const TCGArg *args, bool is_64)
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static void tcg_out_qemu_st(TCGContext *s, TCGOpcode opc, const TCGArg *args, bool is_64)
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{
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{
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wasm_tci_only_tb = true;
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tcg_tci_out_qemu_ldst(s, opc, args);
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tcg_tci_out_qemu_ldst(s, opc, args);
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tcg_wasm_out_qemu_st(s, args, is_64);
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tcg_wasm_out_qemu_st(s, args, is_64);
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}
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}
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