ppc/spapr: remove deprecated machine pseries-2.7
Commit 1392617d35 intended to tag pseries-2.1 - 2.11 machines as
deprecated with reasons mentioned in its commit log.
Removing pseries-2.7 specific code with this patch for now.
While at it, also remove pre-2.8-migration and pci/mmio hacks introduced
for backward compatibility.
Suggested-by: Cédric Le Goater <clg@kaod.org>
Acked-by: Cédric Le Goater <clg@redhat.com>
Signed-off-by: Harsh Prateek Bora <harshpb@linux.ibm.com>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
This commit is contained in:
committed by
Nicholas Piggin
parent
73700ec309
commit
445d3facff
@@ -1457,11 +1457,6 @@ struct ArchCPU {
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opc_handler_t *opcodes[PPC_CPU_OPCODES_LEN];
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/* Fields related to migration compatibility hacks */
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bool pre_2_8_migration;
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target_ulong mig_msr_mask;
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uint64_t mig_insns_flags;
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uint64_t mig_insns_flags2;
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uint32_t mig_nb_BATs;
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bool pre_2_10_migration;
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bool pre_3_0_migration;
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int32_t mig_slb_nr;
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@@ -7452,7 +7452,6 @@ static void ppc_disas_set_info(CPUState *cs, disassemble_info *info)
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}
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static Property ppc_cpu_properties[] = {
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DEFINE_PROP_BOOL("pre-2.8-migration", PowerPCCPU, pre_2_8_migration, false),
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DEFINE_PROP_BOOL("pre-2.10-migration", PowerPCCPU, pre_2_10_migration,
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false),
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DEFINE_PROP_BOOL("pre-3.0-migration", PowerPCCPU, pre_3_0_migration,
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@@ -118,13 +118,6 @@ static const VMStateInfo vmstate_info_vsr = {
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#define VMSTATE_VSR_ARRAY(_f, _s, _n) \
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VMSTATE_VSR_ARRAY_V(_f, _s, _n, 0)
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static bool cpu_pre_2_8_migration(void *opaque, int version_id)
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{
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PowerPCCPU *cpu = opaque;
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return cpu->pre_2_8_migration;
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}
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#if defined(TARGET_PPC64)
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static bool cpu_pre_3_0_migration(void *opaque, int version_id)
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{
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@@ -139,22 +132,6 @@ static int cpu_pre_save(void *opaque)
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PowerPCCPU *cpu = opaque;
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CPUPPCState *env = &cpu->env;
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int i;
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uint64_t insns_compat_mask =
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PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB
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| PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES
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| PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | PPC_FLOAT_FRSQRTES
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| PPC_FLOAT_STFIWX | PPC_FLOAT_EXT
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| PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ
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| PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC
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| PPC_64B | PPC_64BX | PPC_ALTIVEC
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| PPC_SEGMENT_64B | PPC_SLBI | PPC_POPCNTB | PPC_POPCNTWD;
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uint64_t insns_compat_mask2 = PPC2_VSX | PPC2_VSX207 | PPC2_DFP | PPC2_DBRX
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| PPC2_PERM_ISA206 | PPC2_DIVE_ISA206
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| PPC2_ATOMIC_ISA206 | PPC2_FP_CVT_ISA206
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| PPC2_FP_TST_ISA206 | PPC2_BCTAR_ISA207
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| PPC2_LSQ_ISA207 | PPC2_ALTIVEC_207
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| PPC2_ISA205 | PPC2_ISA207S | PPC2_FP_CVT_S64 | PPC2_TM
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| PPC2_MEM_LWSYNC;
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env->spr[SPR_LR] = env->lr;
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env->spr[SPR_CTR] = env->ctr;
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@@ -177,29 +154,6 @@ static int cpu_pre_save(void *opaque)
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env->spr[SPR_IBAT4U + 2 * i + 1] = env->IBAT[1][i + 4];
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}
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/* Hacks for migration compatibility between 2.6, 2.7 & 2.8 */
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if (cpu->pre_2_8_migration) {
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/*
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* Mask out bits that got added to msr_mask since the versions
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* which stupidly included it in the migration stream.
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*/
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target_ulong metamask = 0
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#if defined(TARGET_PPC64)
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| (1ULL << MSR_TS0)
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| (1ULL << MSR_TS1)
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#endif
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;
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cpu->mig_msr_mask = env->msr_mask & ~metamask;
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cpu->mig_insns_flags = env->insns_flags & insns_compat_mask;
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/*
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* CPU models supported by old machines all have
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* PPC_MEM_TLBIE, so we set it unconditionally to allow
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* backward migration from a POWER9 host to a POWER8 host.
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*/
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cpu->mig_insns_flags |= PPC_MEM_TLBIE;
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cpu->mig_insns_flags2 = env->insns_flags2 & insns_compat_mask2;
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cpu->mig_nb_BATs = env->nb_BATs;
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}
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if (cpu->pre_3_0_migration) {
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if (cpu->hash64_opts) {
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cpu->mig_slb_nr = cpu->hash64_opts->slb_size;
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@@ -760,12 +714,6 @@ const VMStateDescription vmstate_ppc_cpu = {
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/* Backward compatible internal state */
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VMSTATE_UINTTL(env.hflags_compat_nmsr, PowerPCCPU),
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/* Sanity checking */
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VMSTATE_UINTTL_TEST(mig_msr_mask, PowerPCCPU, cpu_pre_2_8_migration),
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VMSTATE_UINT64_TEST(mig_insns_flags, PowerPCCPU, cpu_pre_2_8_migration),
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VMSTATE_UINT64_TEST(mig_insns_flags2, PowerPCCPU,
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cpu_pre_2_8_migration),
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VMSTATE_UINT32_TEST(mig_nb_BATs, PowerPCCPU, cpu_pre_2_8_migration),
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VMSTATE_END_OF_LIST()
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},
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.subsections = (const VMStateDescription * const []) {
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