tcg/wasm32: narrow fallback to aliased qemu_ld TBs
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@@ -3392,6 +3392,10 @@ static void tcg_out_qemu_ld(TCGContext *s, TCGOpcode opc, const TCGArg *args, bo
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{
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wasm_tb_had_load = true;
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tcg_tci_out_qemu_ldst(s, opc, args);
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// Aliased qemu_ld - The wasm32 wrapper corrupts vCPU TLB state when the load destination also holds the address.
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if (args[0] == args[1]) {
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wasm_tci_only_tb = true;
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}
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tcg_wasm_out_qemu_ld(s, args, is_64);
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}
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static void tcg_out_qemu_st(TCGContext *s, TCGOpcode opc, const TCGArg *args, bool is_64)
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@@ -3399,8 +3403,7 @@ static void tcg_out_qemu_st(TCGContext *s, TCGOpcode opc, const TCGArg *args, bo
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wasm_tb_had_store = true;
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tcg_tci_out_qemu_ldst(s, opc, args);
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tcg_wasm_out_qemu_st(s, args, is_64);
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/* ponytail: Mixed Store TBs Stay TCI - Pure store TBs are safe, but a store+load/helper TB in uzlib corrupts the vCPU TLB arrays when compiled. */
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bool store_tci = !wasm_store_tci_disabled && (wasm_tb_had_load || wasm_tb_had_helper);
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bool store_tci = false;
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if (s->gen_tb && (wasm_store_tci_hash || wasm_store_bisect_on)) {
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uint64_t pc = s->gen_tb->pc;
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uint32_t h = (uint32_t)((pc * 0x9e3779b97f4a7c15ull) >> 33);
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