diff --git a/hw/misc/esp32c3_rsa.c b/hw/misc/esp32c3_rsa.c
new file mode 100644
index 0000000000..4cc0f79b87
--- /dev/null
+++ b/hw/misc/esp32c3_rsa.c
@@ -0,0 +1,34 @@
+/*
+ * ESP32-C3 RSA accelerator
+ *
+ * Copyright (c) 2023 Espressif Systems (Shanghai) Co. Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or
+ * (at your option) any later version.
+ */
+
+#include "qemu/osdep.h"
+#include "hw/misc/esp32c3_rsa.h"
+
+static void esp32c3_rsa_class_init(ObjectClass *klass, void *data)
+{
+    ESPRsaClass* class = ESP_RSA_CLASS(klass);
+    class->rsa_mem_blk_size = ESP32C3_RSA_MEM_BLK_SIZE;
+    class->date = ESP32C3_RSA_DATE_REG_VALUE;
+}
+
+static const TypeInfo esp32c3_rsa_info = {
+    .name = TYPE_ESP32C3_RSA,
+    .parent = TYPE_ESP_RSA,
+    .instance_size = sizeof(ESP32C3RsaState),
+    .class_init = esp32c3_rsa_class_init,
+    .class_size = sizeof(ESP32C3RsaClass)
+};
+
+static void esp32c3_rsa_register_types(void)
+{
+    type_register_static(&esp32c3_rsa_info);
+}
+
+type_init(esp32c3_rsa_register_types)
diff --git a/hw/misc/meson.build b/hw/misc/meson.build
index 431628bf6e..2ccbb9a383 100644
--- a/hw/misc/meson.build
+++ b/hw/misc/meson.build
@@ -164,6 +164,8 @@ if gcrypt.found()
   system_ss.add(when: [gcrypt, 'CONFIG_RISCV_ESP32C3'], if_true: files(
     'esp_aes.c',
     'esp32c3_aes.c',
+    'esp_rsa.c',
+    'esp32c3_rsa.c',
   ))
 endif
 
diff --git a/include/hw/misc/esp32c3_rsa.h b/include/hw/misc/esp32c3_rsa.h
new file mode 100644
index 0000000000..cdb84e270e
--- /dev/null
+++ b/include/hw/misc/esp32c3_rsa.h
@@ -0,0 +1,29 @@
+/*
+ * ESP32-C3 RSA accelerator
+ *
+ * Copyright (c) 2023 Espressif Systems (Shanghai) Co. Ltd.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 or
+ * (at your option) any later version.
+ */
+#pragma once
+
+#include "esp_rsa.h"
+
+#define TYPE_ESP32C3_RSA "misc.esp32c3.rsa"
+#define ESP32C3_RSA(obj) OBJECT_CHECK(ESP32C3RsaState, (obj), TYPE_ESP32C3_RSA)
+
+#define ESP32C3_RSA_GET_CLASS(obj) OBJECT_GET_CLASS(ESP32C3RsaClass, obj, TYPE_ESP32C3_RSA)
+#define ESP32C3_RSA_CLASS(klass) OBJECT_CLASS_CHECK(ESP32C3RsaClass, klass, TYPE_ESP32C3_RSA)
+
+#define ESP32C3_RSA_MEM_BLK_SIZE    384
+#define ESP32C3_RSA_DATE_REG_VALUE    0x20200618
+
+typedef struct ESP32C3RsaState {
+    ESPRsaState parent;
+} ESP32C3RsaState;
+
+typedef struct ESP32C3RsaClass {
+    ESPRsaClass parent_class;
+} ESP32C3RsaClass;