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tcg/wasm32: refine TLB corruption diagnostics

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This commit is contained in:
Evan Reichard
2026-07-23 13:12:22 -04:00
parent 29cab65aff
commit ec4c6cc95a
2 changed files with 23 additions and 5 deletions
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accel/tcg/cputlb.c
+21 -3
View File
@@ -986,9 +986,27 @@ void tlb_reset_dirty(CPUState *cpu, ram_addr_t start1, ram_addr_t length)
static inline void tlb_set_dirty1_locked(CPUTLBEntry *tlb_entry, static inline void tlb_set_dirty1_locked(CPUTLBEntry *tlb_entry,
vaddr addr) vaddr addr)
{ {
#if defined(EMSCRIPTEN) && !defined(CONFIG_TCG_INTERPRETER)
if (wasm_ramrace_trace && (addr & TARGET_PAGE_MASK) == 0x3fcb8000u) {
printf("FAULTTRACE tlb_set_dirty1 entry=%p before_read=0x%llx before_write=0x%llx before_addend=0x%llx addr=0x%llx\n",
tlb_entry, (unsigned long long)tlb_entry->addr_read,
(unsigned long long)tlb_entry->addr_write,
(unsigned long long)tlb_entry->addend, (unsigned long long)addr);
fflush(stdout);
}
#endif
if (tlb_entry->addr_write == (addr | TLB_NOTDIRTY)) { if (tlb_entry->addr_write == (addr | TLB_NOTDIRTY)) {
tlb_entry->addr_write = addr; tlb_entry->addr_write = addr;
} }
#if defined(EMSCRIPTEN) && !defined(CONFIG_TCG_INTERPRETER)
if (wasm_ramrace_trace && (addr & TARGET_PAGE_MASK) == 0x3fcb8000u) {
printf("FAULTTRACE tlb_set_dirty1 after entry=%p read=0x%llx write=0x%llx addend=0x%llx\n",
tlb_entry, (unsigned long long)tlb_entry->addr_read,
(unsigned long long)tlb_entry->addr_write,
(unsigned long long)tlb_entry->addend);
fflush(stdout);
}
#endif
} }
/* update the TLB corresponding to virtual page vaddr /* update the TLB corresponding to virtual page vaddr
@@ -1738,9 +1756,9 @@ static bool mmu_lookup1(CPUState *cpu, MMULookupPageData *data, MemOp memop,
data->flags = flags; data->flags = flags;
#if defined(EMSCRIPTEN) && !defined(CONFIG_TCG_INTERPRETER) #if defined(EMSCRIPTEN) && !defined(CONFIG_TCG_INTERPRETER)
if (wasm_ramrace_trace && ((addr & TARGET_PAGE_MASK) == 0x3fcb8000u)) { if (wasm_ramrace_trace && ((addr & TARGET_PAGE_MASK) == 0x3fcb8000u)) {
printf("FAULTTRACE mmu_lookup1 addr=0x%llx index=%lu maybe_resized=%d tlb_addr=0x%llx flags=0x%x full=%p full_xlat=0x%llx addend=0x%llx\n", printf("FAULTTRACE mmu_lookup1 addr=0x%llx mmu=%d index=%lu maybe_resized=%d tlb_addr=0x%llx flags=0x%x entry=%p full=%p full_xlat=0x%llx addend=0x%llx\n",
(unsigned long long)addr, (unsigned long)index, maybe_resized, (unsigned long long)addr, mmu_idx, (unsigned long)index, maybe_resized,
(unsigned long long)tlb_addr, flags, full, (unsigned long long)tlb_addr, flags, entry, full,
(unsigned long long)full->xlat_section, (unsigned long long)full->xlat_section,
(unsigned long long)entry->addend); (unsigned long long)entry->addend);
fflush(stdout); fflush(stdout);
tcg/wasm32.c
+2 -2
View File
@@ -1494,8 +1494,8 @@ static void wasm_trace_dram_tlb(CPUArchState *env, uint64_t pc)
e->addr_write != tlbtrace_last_write || e->addr_write != tlbtrace_last_write ||
e->addend != tlbtrace_last_addend || e->addend != tlbtrace_last_addend ||
f->xlat_section != tlbtrace_last_xlat) { f->xlat_section != tlbtrace_last_xlat) {
printf("TLBTRACE pc=0x%llx mmu=%d index=%zu read=0x%llx write=0x%llx addend=0x%llx full_xlat=0x%llx\n", printf("TLBTRACE pc=0x%llx mmu=%d index=%zu entry=%p full=%p read=0x%llx write=0x%llx addend=0x%llx full_xlat=0x%llx\n",
(unsigned long long)pc, mmu, i, (unsigned long long)pc, mmu, i, e, f,
(unsigned long long)e->addr_read, (unsigned long long)e->addr_read,
(unsigned long long)e->addr_write, (unsigned long long)e->addr_write,
(unsigned long long)e->addend, (unsigned long long)e->addend,