145 lines
4.5 KiB
C
145 lines
4.5 KiB
C
/*
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* ESP32 Interrupt Matrix
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*
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* Copyright (c) 2019 Espressif Systems (Shanghai) Co. Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 or
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* (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "hw/hw.h"
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#include "hw/sysbus.h"
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#include "hw/irq.h"
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#include "hw/qdev-properties.h"
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#include "hw/xtensa/esp32_intc.h"
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#define INTMATRIX_UNINT_VALUE 6
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#define IRQ_MAP(cpu, input) s->irq_map[cpu][input]
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static void esp32_intmatrix_irq_handler(void *opaque, int n, int level)
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{
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Esp32IntMatrixState *s = ESP32_INTMATRIX(opaque);
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for (int i = 0; i < ESP32_CPU_COUNT; ++i) {
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if (s->outputs[i] == NULL) {
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continue;
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}
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int out_index = IRQ_MAP(i, n);
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for (int int_index = 0; int_index < s->cpu[i]->env.config->nextint; ++int_index) {
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if (s->cpu[i]->env.config->extint[int_index] == out_index) {
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qemu_set_irq(s->outputs[i][int_index], level);
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break;
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}
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}
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}
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}
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static inline uint8_t* get_map_entry(Esp32IntMatrixState* s, hwaddr addr)
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{
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int source_index = addr / sizeof(uint32_t);
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if (source_index > ESP32_INT_MATRIX_INPUTS * ESP32_CPU_COUNT) {
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error_report("%s: source_index %d out of range", __func__, source_index);
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return NULL;
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}
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int cpu_index = source_index / ESP32_INT_MATRIX_INPUTS;
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source_index = source_index % ESP32_INT_MATRIX_INPUTS;
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return &IRQ_MAP(cpu_index, source_index);
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}
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static uint64_t esp32_intmatrix_read(void* opaque, hwaddr addr, unsigned int size)
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{
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Esp32IntMatrixState *s = ESP32_INTMATRIX(opaque);
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uint8_t* map_entry = get_map_entry(s, addr);
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return (map_entry != NULL) ? *map_entry : 0;
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}
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static void esp32_intmatrix_write(void* opaque, hwaddr addr, uint64_t value, unsigned int size)
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{
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Esp32IntMatrixState *s = ESP32_INTMATRIX(opaque);
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uint8_t* map_entry = get_map_entry(s, addr);
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if (map_entry != NULL) {
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*map_entry = value & 0x1f;
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}
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}
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static const MemoryRegionOps esp_intmatrix_ops = {
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.read = esp32_intmatrix_read,
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.write = esp32_intmatrix_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void esp32_intmatrix_reset_hold(Object *obj, ResetType type)
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{
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Esp32IntMatrixState *s = ESP32_INTMATRIX(obj);
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memset(s->irq_map, INTMATRIX_UNINT_VALUE, sizeof(s->irq_map));
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for (int i = 0; i < ESP32_CPU_COUNT; ++i) {
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if (s->outputs[i] == NULL) {
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continue;
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}
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for (int int_index = 0; int_index < s->cpu[i]->env.config->nextint; ++int_index) {
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qemu_irq_lower(s->outputs[i][int_index]);
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}
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}
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}
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static void esp32_intmatrix_realize(DeviceState *dev, Error **errp)
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{
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Esp32IntMatrixState *s = ESP32_INTMATRIX(dev);
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for (int i = 0; i < ESP32_CPU_COUNT; ++i) {
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if (s->cpu[i]) {
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s->outputs[i] = xtensa_get_extints(&s->cpu[i]->env);
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}
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}
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esp32_intmatrix_reset_hold(OBJECT(dev), RESET_TYPE_COLD);
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}
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static void esp32_intmatrix_init(Object *obj)
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{
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Esp32IntMatrixState *s = ESP32_INTMATRIX(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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memory_region_init_io(&s->iomem, obj, &esp_intmatrix_ops, s,
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TYPE_ESP32_INTMATRIX, ESP32_INT_MATRIX_INPUTS * ESP32_CPU_COUNT * sizeof(uint32_t));
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sysbus_init_mmio(sbd, &s->iomem);
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qdev_init_gpio_in(DEVICE(s), esp32_intmatrix_irq_handler, ESP32_INT_MATRIX_INPUTS);
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}
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static Property esp32_intmatrix_properties[] = {
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DEFINE_PROP_LINK("cpu0", Esp32IntMatrixState, cpu[0], TYPE_XTENSA_CPU, XtensaCPU *),
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DEFINE_PROP_LINK("cpu1", Esp32IntMatrixState, cpu[1], TYPE_XTENSA_CPU, XtensaCPU *),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void esp32_intmatrix_class_init(ObjectClass *klass, void *data)
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{
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DeviceClass *dc = DEVICE_CLASS(klass);
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ResettableClass *rc = RESETTABLE_CLASS(klass);
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rc->phases.hold = esp32_intmatrix_reset_hold;
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dc->realize = esp32_intmatrix_realize;
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device_class_set_props(dc, esp32_intmatrix_properties);
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}
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static const TypeInfo esp32_intmatrix_info = {
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.name = TYPE_ESP32_INTMATRIX,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(Esp32IntMatrixState),
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.instance_init = esp32_intmatrix_init,
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.class_init = esp32_intmatrix_class_init
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};
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static void esp32_intmatrix_register_types(void)
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{
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type_register_static(&esp32_intmatrix_info);
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}
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type_init(esp32_intmatrix_register_types)
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