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qemu-xteink/tcg
TANG Tiancheng a31768c019 tcg/riscv: Implement vector cmp/cmpsel ops
Extend comparison results from mask registers to SEW-width elements,
following recommendations in The RISC-V SPEC Volume I (Version 20240411).
This aligns with TCG's cmp_vec behavior by expanding compare results to
full element width: all 1s for true, all 0s for false.

Signed-off-by: TANG Tiancheng <tangtiancheng.ttc@alibaba-inc.com>
Reviewed-by: Liu Zhiwei <zhiwei_liu@linux.alibaba.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20241007025700.47259-7-zhiwei_liu@linux.alibaba.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
2024-10-22 11:57:25 -07:00
..
2024-02-05 22:45:41 +00:00
2024-07-03 18:41:26 +02:00
2024-09-22 06:54:49 +02:00
2024-09-22 06:54:49 +02:00
2024-09-22 06:54:49 +02:00
2024-10-22 11:57:25 -07:00