Peter Maydell ac6ad1dca8 target/arm: Implement MVE VMULL ...

Implement the MVE VMULL insn, which multiplies two single
width integer elements to produce a double width result.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210617121628.20116-19-peter.maydell@linaro.org

2021-06-21 17:12:51 +01:00

..

alpha

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

arm

target/arm: Implement MVE VMULL

2021-06-21 17:12:51 +01:00

avr

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

cris

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

hexagon

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

hppa

target/hppa: Remove unused 'memory.h' header

2021-06-05 21:23:14 +02:00

i386

Merge remote-tracking branch 'remotes/ehabkost-gl/tags/x86-next-pull-request' into staging

2021-06-21 11:26:04 +01:00

m68k

softfloat: Introduce Floatx80RoundPrec

2021-06-03 14:04:02 -07:00

microblaze

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

mips

target/mips: Fix 'Uncoditional' typo

2021-06-05 21:28:54 +02:00

nios2

target/nios2: fix page-fit instruction count

2021-06-05 21:17:10 +02:00

openrisc

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

ppc

target/ppc: fix single-step exception regression

2021-06-03 18:10:31 +10:00

riscv

target/riscv: rvb: add b-ext version cpu option

2021-06-08 09:59:46 +10:00

rx

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

s390x

docs: fix references to docs/devel/tracing.rst

2021-06-02 06:51:09 +02:00

sh4

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

sparc

docs: fix references to docs/devel/tracing.rst

2021-06-02 06:51:09 +02:00

tricore

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

xtensa

hw/core: Constify TCGCPUOps

2021-05-26 15:33:59 -07:00

meson.build

Drop the deprecated unicore32 target

2021-05-12 18:20:52 +02:00