evan
fe35cb68d6
Ports the ESP32 Wi-Fi emulation (esp32c3_wifi, esp32_wifi_ap, esp32_wlan_*) from the lcgamboa/PICSimLab QEMU fork and integrates it behind the esp32c3_wifi NIC model, plus the supporting radio peripherals (ANA/PHYA/FE/PWR manager). - Exposes an open SSID 'qemu' bridged to the host via QEMU user-mode NAT (libslirp, now enabled in the native build). - Adds ESP-IDF 5.5 compatibility fixes: channel resolution from the beacon DS Parameter Set IE / AP lookup, persistent SYSCON register backing (phy_module_has_clock_bits), DMA inlink/outlink descriptor mirroring, RX descriptor ring reset on item.next==0, and descriptor ownership/length semantics. - xteink-emu now starts with -nic user,model=esp32c3_wifi and synthesizes an eFuse image with a fixed guest MAC. Verified against a stock Arduino-ESP32 sketch: scans, finds 'qemu', associates, gets DHCP 192.168.4.15, and completes an outbound TCP connection. Unmodified CrossPoint firmware still needs the power-button hold during boot (tracked separately).
85 lines
2.1 KiB
C
85 lines
2.1 KiB
C
/* ESP32C3 unimp/dummy peripheral handler
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*/
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/error-report.h"
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#include "qapi/error.h"
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#include "hw/hw.h"
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#include "hw/sysbus.h"
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#include "hw/registerfields.h"
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#include "hw/boards.h"
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#include "hw/misc/esp32c3_pwrmng.h"
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#include "hw/misc/esp32c3_reg.h"
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#define DEBUG 0
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static uint64_t esp32c3_pwrmng_read(void *opaque, hwaddr addr, unsigned int size)
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{
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static bool init = false;
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Esp32c3PwrMngState *s = ESP32C3_PWR_MANAGER(opaque);
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uint32_t r = s->mem[addr/4];
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switch(addr){
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case 0x07C:
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/* Return a random 32-bit value */
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if (!init) {
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srand(time(NULL));
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init = true;
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}
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r = rand();
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break;
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case 0x128: //DMA enabled
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r = 0 ;
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break;
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case 0x118: //PWR int events
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r = 0 ;
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break;
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}
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if(DEBUG) printf("esp32_pwrmng_read 0x%04lx= 0x%08x\n",(unsigned long) addr,r);
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return r;
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}
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static void esp32c3_pwrmng_write(void *opaque, hwaddr addr,
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uint64_t value, unsigned int size)
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{
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Esp32c3PwrMngState *s = ESP32C3_PWR_MANAGER(opaque);
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if(DEBUG) printf("esp32_pwrmng_write 0x%04lx= 0x%08lx\n",(unsigned long) addr, (unsigned long) value);
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s->mem[addr/4]=value;
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}
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static const MemoryRegionOps esp32c3_pwrmng_ops = {
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.read = esp32c3_pwrmng_read,
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.write = esp32c3_pwrmng_write,
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void esp32c3_pwrmng_init(Object *obj)
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{
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Esp32c3PwrMngState *s = ESP32C3_PWR_MANAGER(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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memory_region_init_io(&s->iomem, obj, &esp32c3_pwrmng_ops, s, TYPE_ESP32C3_PWR_MANAGER, 0x1000);
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sysbus_init_mmio(sbd, &s->iomem);
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}
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static const TypeInfo esp32c3_pwrmng_info = {
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.name = TYPE_ESP32C3_PWR_MANAGER,
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.parent = TYPE_SYS_BUS_DEVICE,
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.instance_size = sizeof(Esp32c3PwrMngState),
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.instance_init = esp32c3_pwrmng_init,
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};
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static void esp32c3_pwrmng_register_types(void)
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{
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type_register_static(&esp32c3_pwrmng_info);
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}
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type_init(esp32c3_pwrmng_register_types)
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