wasm-emu: document state materialization probes (E20-E22)
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@@ -616,3 +616,61 @@ vCPU execution state/translation, not an unmapped legitimate pointer.
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Production default remains blanket store-TCI. The next useful probe is not more
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IO-thread DRAM logging; it is targeted vCPU-state/TLB-entry instrumentation at
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the failing translated block or around async exit handling.
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## E20-E22: state materialization probes
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E11 had already identified the first live divergence after arming at open:
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`pc=0x4201d6ea` in `utf8NextCodepoint()`, where TCI had applied the prologue
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`sp -= 16` to `CPUArchState` but compiled-live still had stale `env->gpr[2]`.
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The disassembly confirms `0x4201d6d6..0x4201d6e8` is exactly the function
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prologue and first branch:
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```text
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4201d6d6: addi sp,sp,-16
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4201d6d8: sw s2,0(sp)
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...
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4201d6e4: lbu s1,0(s2)
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4201d6e8: beqz s1,4201d7a8
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4201d6ea: mv s0,a0
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```
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### E20: no-chain boundary probe
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Added opt-in `?stateflush=open`, armed by the browser harness immediately before
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opening `example.txt`. It reuses the existing `wasm_diff_needs_nochain_at(pc)`
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app-flash window to force app TBs to return to C without running the expensive
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compiled-vs-TCI differential shadow.
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Result with `?nostoretci&stateflush=open`: original corruption still reproduced
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(`Invalid read 0x3FCB80A6`, `MEPC 0x4201e210`). Returning to C between app TBs
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is not enough; the wasm backend does not materialize `CPUArchState` merely by
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leaving a compiled TB.
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### E21/E22: blind helper spill attempts are invalid
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Tested a direct backend fix candidate: spill TCG global-mem temps before C helper
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calls so slow-path load/store helpers and exceptions see coherent architectural
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state.
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- spilling all global-mem temps before+after helpers caused an earlier invalid
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read around `0x07585d82`;
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- spilling before helpers only caused the same failure;
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- narrowing to RISC-V integer GPR globals (`xN/...`) still caused immediate
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invalid writes around `0x075f....`.
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Conclusion: helper-boundary materialization is still the right suspect, but it
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must respect TCG liveness/state. Blind backend spills at helper emission can
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write stale globals back into `CPUArchState` and make corruption worse. The fix
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belongs in the wasm backend's handling of TCG sync/liveness around calls (or in
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targeted generated `sync_i32/i64` ops), not in an unconditional helper wrapper
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spill.
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### Revised next step
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Trace the TCG liveness/sync ops for the divergent prologue TB and the later
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slow-path helper TB: verify whether `la_global_sync()` marks `x2/sp` `TS_MEM`
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across the relevant call/branch, and whether the wasm backend emits the
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corresponding store. The observed bug is now specifically: **compiled globals and
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`CPUArchState` are allowed to diverge, and the wasm backend exposes stale env to
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helper/exception-visible code when store TBs stay compiled.**
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@@ -169,6 +169,8 @@ try:
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driver.execute_script('window.xteinkArmTcgDiff2 && window.xteinkArmTcgDiff2()')
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if 'ramrace=open' in url:
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driver.execute_script('window.xteinkEnableRamrace && window.xteinkEnableRamrace()')
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if 'stateflush=open' in url:
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driver.execute_script('window.xteinkEnableStateflush && window.xteinkEnableStateflush()')
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open_start = time.monotonic()
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press(confirm, 'opening example.txt')
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open_seconds = time.monotonic() - open_start
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Vendored
+1
-1
Submodule third_party/qemu updated: ab9c5823ee...346c789851
@@ -498,6 +498,9 @@ async function boot(file, variant, setStatus) {
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if (params.get('ramrace') === 'open') {
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window.xteinkEnableRamrace = () => options._wasm_enable_ramrace_trace();
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} else if (params.has('ramrace')) options._wasm_enable_ramrace_trace();
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if (params.get('stateflush') === 'open') {
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window.xteinkEnableStateflush = () => options._wasm_stateflush_enable();
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} else if (params.has('stateflush')) options._wasm_stateflush_enable();
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if (params.has('sthash')) options._wasm_set_store_tci_hash(Number(params.get('sthash')) || 1);
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if (params.has('stcmask')) options._wasm_set_store_bisect(Number(params.get('stcw')) || 0, Number(params.get('stcmask')) >>> 0, (Number(params.get('stcval')) || 0) >>> 0);
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options.FS.mkdirTree('/bios');
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