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Author SHA1 Message Date
evan c1ee841e58 Generalize m25p80 Read-ID 0x90/0xAB beyond SST chips 2026-07-20 09:00:24 -04:00
evan ce99303135 Fix esp_sha hash callback signature mismatch for emscripten 2026-07-20 07:45:14 -04:00
evan cddd964c57 Guard esp32c3 cache XTS-AES use when gcrypt absent 2026-07-20 07:25:59 -04:00
evan 1ff6c3a51e Fix GLib GCompareFunc type conflict for emscripten 2026-07-20 07:12:55 -04:00
evan a0adc5f6c0 Backport Emscripten RAM allocation fix 2026-07-20 06:50:58 -04:00
evan b0bce6c486 Add xteink browser bridge 2026-07-20 00:20:51 -04:00
evan d58495104a Declare minimal xteink device dependencies 2026-07-19 22:06:20 -04:00
evan d1d3f6e360 Limit wasm build to xteink devices 2026-07-19 21:57:52 -04:00
evan c4227568de Add xteink machine for wasm build 2026-07-19 21:56:40 -04:00
evan fa545a4ec1 Port qemu-wasm backend to Espressif QEMU 9.2 2026-07-19 21:40:41 -04:00
Kohei Tokunaga e712868ec5 Update wasm backend 
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
 2026-07-19 21:08:45 -04:00
Kohei Tokunaga 2816a551ef TCG: add wasm backend 
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
 2026-07-19 21:08:45 -04:00
Omar Chebib 40edccac41 hw/riscv: fix interrupts being lost or delayed when MIE=0 on the ESP32-C3 2026-04-17 10:15:24 +08:00
Ivan Grokhotkov 00b2b7500e ci: consolidate Jira sync workflows and update to sync-jira-actions@v1 
Replace three separate Jira sync workflows (new_issues.yml,
issue_comment.yml, new_prs.yml) with a single sync-jira.yml following
the recommended pattern from espressif/sync-jira-actions.

Changes:
- Migrate from espressif/github-actions/sync_issues_to_jira@master
  to espressif/sync-jira-actions@v1
- Add missing GITHUB_TOKEN permissions (contents:read, issues:write,
  pull-requests:write)
- Add workflow_dispatch trigger for manual syncing
- Add dynamic run-name for better visibility in Actions UI

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
 2026-04-16 13:21:20 +02:00
Ivan Grokhotkov e89262698c ci: update GitHub Actions to Node.js 24 compatible versions 
Node.js 20 is deprecated on GitHub Actions runners and will be forced
to Node.js 24 starting June 2, 2026, with Node.js 20 removed entirely
on September 16, 2026.

Update all actions to versions that support Node.js 24:
- actions/checkout: v4/master -> v6
- actions/upload-artifact: v4 -> v7
- actions/download-artifact: v4 -> v8
- softprops/action-gh-release: v1 -> v2

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
 2026-04-16 13:21:20 +02:00
John Snow cdb2bd0304 python: fix msys64 wheel directory specification 
In python3.14, fixes were made to the file URI parsing [1] such that
file URIs that used to work but were technically out of spec are now
broken.

As a result, our msys2 GitLab CI tests began failing.

Stop using "file://" URI links in favor of simple paths (Thanks pbo) to
fix parsing errors under Python 3.14 and fix the msys2 GitLab CI tests.

[1] https://docs.python.org/3/whatsnew/3.14.html#urllib

Reported-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Suggested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: John Snow <jsnow@redhat.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Tested-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20260130050518.517688-2-jsnow@redhat.com>
 2026-04-15 15:01:26 +02:00
harshal.patil ba5950398f feat(xtensa/esp32s3): Extend the ESP32-S3's TIE instructions 
1. Missing bare ee.vldbc.{8,16,32} instructions - Added 3 opcode table entries with addr_nop and updated translate_vldbc_s3 to handle addr_nop without erroring.
2. Missing ee.st.qacc_{h,l}.{h.32,l.128}.ip store instructions - Added 4 opcode table entries, 2 translate functions, and 2 helper functions (with declarations in helper.h) to implement the QACC store operations as mirrors of the existing load counterparts.
3. ee.src.q incorrect qs1->qs0 copy - The bare ee.src.q qa, qs0, qs1 was incorrectly copying qs1→qs0 after the funnel shift. Per the TRM, only the .qup variant does this copy. Fixed by making the copy conditional on op_type == vmul_qup.
4. Add ee.st.accx.ip to store 40-bit ACCX (zero-extended to 64-bit) to memory, 8-byte aligned.
5. Add ee.ld.ua_state.ip to load 128-bit UA_STATE from memory, 16-byte aligned.
6. Add ee.st.ua_state.ip to store 128-bit UA_STATE to memory, 16-byte aligned.
7. Add ee.ldxq.32: Indexed load: compute address from Q register s16 segment, load 32-bit into Q register segment.
8. Add ee.stxq.32: Indexed store: compute address from Q register s16 segment, store 32-bit from Q register segment.
 2026-04-15 14:08:04 +02:00
Nguyen Dinh Phi a06102167d util: Move qemu_ftruncate64 from block/file-win32.c to oslib-win32.c 
qemu_ftruncate64() is a general-purpose utility function that may be
used outside of the block layer. Move it to util/oslib-win32.c where
other Windows-specific utility functions reside.

Signed-off-by: Nguyen Dinh Phi <phind.uet@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Message-ID: <20251218085446.462827-3-phind.uet@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
 2026-04-15 13:39:21 +02:00
Ivan Grokhotkov (bot) 155e8738ef ci: update macOS runners from macos-13 to macos-14 
The macOS-13 runner images have been retired by GitHub.
Update to macos-14 and macos-14-xlarge respectively.

See: https://github.com/actions/runner-images/issues/13046

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
 2026-04-15 13:39:21 +02:00
Ivan Grokhotkov (bot) 428ede1f31 ci: fix Windows build to not require libiconv-2.dll at runtime 
Fix the Windows release binary failing to start due to missing
libiconv-2.dll. The root cause was the sed workaround using .dll.a
files (import libraries for dynamic linking) instead of .a files
(static libraries).

Changes:
- Fix sed command in configure-win.sh to use static libraries (.a)
  instead of dynamic import libraries (.dll.a) for libiconv/libintl
- Add bundle-win-dlls.sh script that detects and copies any missing
  DLLs as a safety net (reports none needed with proper static linking)

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
 2026-04-15 13:39:21 +02:00
159336 at Massey 33cc9a8740 Fix gdma not checking ownership and clearing the owner bit correctly. 
This didn't matter in the past but recent version of the idf check that the bit has been cleared in gdma_link_mount_buffers()
 2026-02-03 13:53:43 +08:00
Throows ab1bfa960a hw/xtensa/esp32s3: add sdmmc peripheral 2025-09-13 18:16:56 +02:00
Yuan Yu 18a7345ed4 hw/net/can: remove interrupt handling from ESP32 TWAI state 2025-08-27 14:55:14 +08:00
Ivan Grokhotkov 4f4148e2f6 ci: fix paths in the checksum file 2025-08-15 12:39:25 +02:00
Sv. Lockal 2204e2b15b mkvenv: Support pip 25.2 
Fix compilation with pip-25.2 due to missing distlib.version

Bug: https://gitlab.com/qemu-project/qemu/-/issues/3062

Signed-off-by: Sv. Lockal <lockalsash@gmail.com>
[Edits: Type "safety" whackamole --js]
Signed-off-by: John Snow <jsnow@redhat.com>
Message-ID: <20250811190159.237321-1-jsnow@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
 2025-08-15 11:38:40 +02:00
Omar Chebib 30f83141bb hw/misc: implement SPI data transfers for the PSRAM in both QPI and OPI. 2025-08-15 09:41:13 +08:00
Yuan Yu 8066b0c9d4 hw/net/can: fix CAN bus connection logic in esp32_twai.c to make sure to check if canbus is valid before connecting 2025-08-14 12:10:41 +08:00
Yuan Yu 38f153e737 hw/riscv/esp32s3: added the TWAI peripheral to the ESP32-S3 machine state and updated the machine initialization function to realize and connect the TWAI device 2025-07-31 14:42:57 +08:00
Yuan Yu d5db88447b hw/net/can: add ESP32-S3 TWAI peripheral emulation, which 
inherits from the ESP32 TWAI implementation.
 2025-07-31 14:42:57 +08:00
Yuan Yu b5b69aea8a hw/riscv/esp32c3: added the TWAI peripheral to the ESP32-C3 machine state and updated the machine initialization function to realize and connect the TWAI device 2025-07-31 14:42:57 +08:00
Yuan Yu 6e13d72071 hw/net/can: add ESP32-C3 TWAI peripheral emulation 
Add emulation support for the ESP32-C3 TWAI (CAN bus) peripheral, which
inherits from the ESP32 TWAI implementation.
 2025-07-31 14:42:57 +08:00
Yuan Yu dcf57b8d44 hw/xtensa: add CAN peripheral to ESP32 2025-07-31 14:36:30 +08:00
Yuan Yu f12f35d56e hw/net/can: add emulation of SJA1000-based CAN controller for ESP32 series of chips 2025-07-31 14:36:30 +08:00
Omar Chebib c46f68cfd3 hw/timer: modify the ESP32-C3 TimerGroup driver to override the new generic one 2025-06-24 14:55:53 +08:00
Omar Chebib 2b7742774a hw/timer: implement an ESP32-S3 TimerGroup that overrides the new generic one 2025-06-24 14:55:53 +08:00
Omar Chebib 57330b48e4 hw/timer: implement a generic TimerGoup controller for newer Espressif targets 2025-06-24 14:55:53 +08:00
Omar Chebib 248b410174 hw/misc: optimize flash decryption speed on the ESP32 2025-05-13 17:30:32 +08:00
Omar Chebib 1ede4bd3d9 riscv: fix a bug in ESP CPU that resulted in some interrupts being dismissed 2025-04-17 10:02:17 +08:00
Omar Chebib fd97b40f5a hw/timer: fix several bug related to timings, both in cycle count and TimerGroup for the ESP32-C3 2025-04-17 10:02:17 +08:00
Omar Chebib 16a219aac8 misc/ssi_psram: refactor PSRAM to use a state machine 
The emulated PSRAM now internally uses a state machine, making is more sturdy
and resilient to dummy cycles.

* Fixes #57
 2025-04-03 11:56:10 +08:00
Omar Chebib 9607e26254 esp32: refactor drivers to use three-stage reset instead of legacy reset 2025-03-25 17:42:45 +08:00
Omar Chebib e0bfd3961f esp32s3: refactor drivers to use three-stage reset instead of legacy reset 2025-03-25 17:24:12 +08:00
Omar Chebib 95c74f43e2 esp: refactor Espressif generic drivers to use three-stage reset instead of legacy reset 2025-03-25 16:41:56 +08:00
Omar Chebib 17207a3c3f esp32c3: refactor drivers to use three-stage reset instead of legacy reset 2025-03-25 15:36:04 +08:00
Omar Chebib ccdda32084 hw/timer: fix reset/default value for register SYSTIMER_CONF on ESP targets 
* Fixes https://github.com/espressif/qemu/issues/120
 2025-03-10 18:06:28 +08:00
Dmitry Yakovlev 7591824ec4 hw/xtensa: implement ESP32-S3 machine 
This also includes the ESP32-S3 BIOS (ROM bootloader)
 2025-02-28 16:39:03 +01:00
Dmitry Yakovlev c0cce1fc74 hw/i2c: add I2C to ESP32-S3 
ESP32 implementation is used as a stub.
 2025-02-28 16:39:03 +01:00
Dmitry Yakovlev 0c1bf393dc hw/misc: implement ESP32-S3 XTS-AES peripheral 
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
 2025-02-28 16:39:03 +01:00
Dmitry Yakovlev bd9cb721a3 hw/misc: implement ESP32-S3 Digital Signature 
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
 2025-02-28 16:39:03 +01:00
Dmitry Yakovlev e67f694323 hw/misc: implement ESP32-S3 RSA 
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
 2025-02-28 16:39:03 +01:00