 evan
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cbeba3fbe9
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fix(display): classify X3 grayscale from loaded LUTs
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2026-07-21 11:42:04 -04:00 |
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|
evan
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b0bce6c486
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Add xteink browser bridge
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2026-07-20 00:20:51 -04:00 |
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|
evan
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c4227568de
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Add xteink machine for wasm build
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2026-07-19 21:56:40 -04:00 |
|
 Kohei Tokunaga
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e712868ec5
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Update wasm backend
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
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2026-07-19 21:08:45 -04:00 |
|
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Kohei Tokunaga
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2816a551ef
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TCG: add wasm backend
Signed-off-by: Kohei Tokunaga <ktokunaga.mail@gmail.com>
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2026-07-19 21:08:45 -04:00 |
|
 Omar Chebib
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40edccac41
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hw/riscv: fix interrupts being lost or delayed when MIE=0 on the ESP32-C3
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2026-04-17 10:15:24 +08:00 |
|
|
Omar Chebib
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30f83141bb
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hw/misc: implement SPI data transfers for the PSRAM in both QPI and OPI.
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2025-08-15 09:41:13 +08:00 |
|
 Yuan Yu
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dcf57b8d44
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hw/xtensa: add CAN peripheral to ESP32
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2025-07-31 14:36:30 +08:00 |
|
|
Omar Chebib
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c46f68cfd3
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hw/timer: modify the ESP32-C3 TimerGroup driver to override the new generic one
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2025-06-24 14:55:53 +08:00 |
|
|
Omar Chebib
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2b7742774a
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hw/timer: implement an ESP32-S3 TimerGroup that overrides the new generic one
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2025-06-24 14:55:53 +08:00 |
|
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Omar Chebib
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57330b48e4
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hw/timer: implement a generic TimerGoup controller for newer Espressif targets
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2025-06-24 14:55:53 +08:00 |
|
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Omar Chebib
|
16a219aac8
|
misc/ssi_psram: refactor PSRAM to use a state machine
The emulated PSRAM now internally uses a state machine, making is more sturdy
and resilient to dummy cycles.
* Fixes #57
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2025-04-03 11:56:10 +08:00 |
|
|
Omar Chebib
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ccdda32084
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hw/timer: fix reset/default value for register SYSTIMER_CONF on ESP targets
* Fixes https://github.com/espressif/qemu/issues/120
|
2025-03-10 18:06:28 +08:00 |
|
 Dmitry Yakovlev
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7591824ec4
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hw/xtensa: implement ESP32-S3 machine
This also includes the ESP32-S3 BIOS (ROM bootloader)
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2025-02-28 16:39:03 +01:00 |
|
|
Dmitry Yakovlev
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0c1bf393dc
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hw/misc: implement ESP32-S3 XTS-AES peripheral
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
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2025-02-28 16:39:03 +01:00 |
|
|
Dmitry Yakovlev
|
bd9cb721a3
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hw/misc: implement ESP32-S3 Digital Signature
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
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2025-02-28 16:39:03 +01:00 |
|
|
Dmitry Yakovlev
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e67f694323
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hw/misc: implement ESP32-S3 RSA
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
|
2025-02-28 16:39:03 +01:00 |
|
 harshal.patil
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3629646ec5
|
hw/misc: Implement ESP32-S3 AES
|
2025-02-28 16:39:03 +01:00 |
|
|
harshal.patil
|
24deaa4323
|
hw/misc: Implement ESP32-S3 HMAC
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2025-02-28 16:39:02 +01:00 |
|
|
Dmitry Yakovlev
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6c66f8c15a
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hw/misc: Add dummy ESP32-S3 PMS module
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2025-02-28 16:39:02 +01:00 |
|
|
Dmitry Yakovlev
|
8ab216a956
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hw/nvram: Implement ESP32-S3 eFuse
Co-authored-by: Omar Chebib <omar.chebib@espressif.com>
|
2025-02-28 16:39:02 +01:00 |
|
|
Dmitry Yakovlev
|
015a0fbc4f
|
hw/misc: implement ESP32-S3 RNG
|
2025-02-28 16:39:02 +01:00 |
|
|
Dmitry Yakovlev
|
c5a5b13d57
|
hw/misc: implement ESP32-S3 real-time clock module
|
2025-02-28 16:39:02 +01:00 |
|
|
Dmitry Yakovlev
|
6eceeee95b
|
hw/misc: Implement ESP32-S3 SHA
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
|
2025-02-28 16:39:02 +01:00 |
|
|
Dmitry Yakovlev
|
9a33d7d456
|
hw/dma: implement ESP32-S3 GDMA
Co-authored-by: Omar Chebib <omar.chebib@espressif.com>
|
2025-02-28 16:39:02 +01:00 |
|
|
Omar Chebib
|
81f8593bc5
|
hw/misc: Implement ESP32-S3 Cache (SPI Flash)
Co-authored-by: Dmitry Yakovlev <dmitry@espressif.com>
|
2025-02-28 16:39:02 +01:00 |
|
|
Dmitry Yakovlev
|
e013d77398
|
hw/xtensa: implement ESP32-S3 Interrupt Matrix
All features are implemented, except level/edge trigger option.
|
2025-02-26 07:41:42 +01:00 |
|
|
Dmitry Yakovlev
|
e458bfa43f
|
hw/xtensa: implement ESP32-S3 clock and system registers
|
2025-02-26 07:41:42 +01:00 |
|
|
Dmitry Yakovlev
|
4b9285f1de
|
hw/ssi: implement ESP32-S3 SPI1 (SPI flash)
Co-authored-by: Omar Chebib <omar.chebib@espressif.com>
|
2025-02-26 07:41:42 +01:00 |
|
|
Dmitry Yakovlev
|
79eb790ebe
|
hw/timer: implement ESP32-S3 System Timer
Co-authored-by: Omar Chebib <omar.chebib@espressif.com>
|
2025-02-26 07:41:42 +01:00 |
|
|
Dmitry Yakovlev
|
d585712419
|
hw/gpio: implement ESP32-S3 GPIO
S3 GPIO overrides ESP32 GPIO driver and modifies the boot strap pin
|
2025-02-26 07:41:42 +01:00 |
|
|
Dmitry Yakovlev
|
dced9356d8
|
hw/char: implement ESP32-S3 UART
S3 UART overrides ESP32's UART
|
2025-02-26 07:41:42 +01:00 |
|
|
Dmitry Yakovlev
|
58bdf76da0
|
tcg: add support for 8-argument helpers
|
2025-02-26 07:41:41 +01:00 |
|
|
Omar Chebib
|
6353353d25
|
hw/riscv: implement ESP32-C3 machine
This also includes the C3 BIOS (ROM bootloader)
|
2025-02-26 07:41:41 +01:00 |
|
|
harshal.patil
|
7199aeb023
|
hw/misc: implement ESP32-C3 XTS-AES peripheral
|
2025-02-26 07:41:41 +01:00 |
|
|
harshal.patil
|
9f1a4bbec8
|
hw/misc: implement ESP32-C3 Digital Signature
|
2025-02-26 07:41:41 +01:00 |
|
|
harshal.patil
|
4479e366fb
|
hw/misc: Implement a generic Digital Signature driver for newer Espressif targets
|
2025-02-26 07:41:41 +01:00 |
|
|
Omar Chebib
|
e1bfe6adfd
|
hw/misc: implement ESP32-C3 RSA
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
|
2025-02-26 07:41:41 +01:00 |
|
|
harshal.patil
|
cbd9c20425
|
hw/misc: implement a generic RSA driver for newer Espressif targets
|
2025-02-26 07:41:41 +01:00 |
|
|
Omar Chebib
|
9385e8de91
|
hw/misc: implement ESP32-C3 AES
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
|
2025-02-26 07:41:41 +01:00 |
|
|
harshal.patil
|
78702e57a0
|
hw/misc: Implement a generic AES driver for newer Espressif targets
|
2025-02-26 07:41:40 +01:00 |
|
|
harshal.patil
|
f7ade96f03
|
hw/misc: implement ESP32-C3 HMAC
Added an internal HMAC implementation using the existing internal SHA APIs
|
2025-02-26 07:41:40 +01:00 |
|
|
harshal.patil
|
e23b18cfc2
|
hw/misc: Implement a generic HMAC driver for newer Espressif targets
|
2025-02-26 07:41:40 +01:00 |
|
|
Omar Chebib
|
95dbb0580d
|
hw/nvram: implement ESP32-C3 eFuses
|
2025-02-26 07:41:40 +01:00 |
|
|
Omar Chebib
|
37f6a5ad70
|
hw/nvram: implement two Efuse classes for the ESP32-C3 and the ESP32-S3
The new efuses classes are derived from the common efuse implementation: ESPEfuseClass.
|
2025-02-26 07:41:40 +01:00 |
|
|
Omar Chebib
|
03ce2cfee8
|
hw/misc: implement ESP32-C3 RTC CNTL registers
|
2025-02-26 07:41:40 +01:00 |
|
|
Omar Chebib
|
e9cb83a49f
|
hw/misc: implement ESP32-C3 USB Serial JTAG as a stub
The module doesn't do much at the moment, it is used as a stub
|
2025-02-26 07:41:40 +01:00 |
|
|
Omar Chebib
|
6569a0882a
|
hw/misc: Implement ESP32-C3 SHA
Co-authored-by: Harshal Patil <harshal.patil@espressif.com>
|
2025-02-26 07:41:40 +01:00 |
|
|
harshal.patil
|
24970c0d2c
|
hw/misc: Implement a generic SHA driver for newer Espressif targets
|
2025-02-26 07:41:40 +01:00 |
|
|
Omar Chebib
|
3418debeda
|
hw/dma: implement ESP32-C3 GDMA
|
2025-02-26 07:41:39 +01:00 |
|