CrossPoint flash detection sends Read-ID (0x90/0xAB); the model only handled it
for SST chips, so the is25lp128 returned nothing and detection fell into an
SFDP/garbage path that crashed QEMU. Return manufacturer + device id for any
chip, as real hardware does.
Add a log panel that captures QEMU stdout/stderr, route serial to stdio, and
pass -d guest_errors,unimp so device warnings (e.g. the m25p80 Read-ID gap that
stalls CrossPoint boot) are visible in the browser. Read the framebuffer via
HEAPU8 to match the validated node path.
--tls generates a self-signed cert (SANs: localhost, 127.0.0.1, LAN IP) so a
headless box is reachable directly over HTTPS, which browsers treat as a secure
context (required for cross-origin isolation). make web now defaults to TLS.
Accept the ~5 MB release firmware.bin directly: place it at 0x10000 in a
0xFF-erased 16 MB image alongside the bundled ESP32-C3 bootloader (0x0) and
CrossPoint partition table (0x8000). m25p80 requires a full chip-size backing,
so the 16 MB image is still built, but the user no longer pre-merges. Full
16 MB images are still accepted as-is.
Drop EMULATE_FUNCTION_POINTER_CASTS (it broke the wasm32 TCG ffi_call_js
path with BigInt errors) and fix the underlying function-pointer signature
mismatches instead: object_class_cmp GCompareFunc, esp_sha hash-callback
wrappers, and an xts_aes NULL guard in the ESP32-C3 cache. Backport the
upstream Emscripten anonymous-RAM allocator fix. Firmware now boots and
initializes the X3 panel; a post-init boot stall remains.
evan